We want to create a very simple model for a register. Think of a register as a black box that contains an array.

In some sense, this is not really a black box, because we have some idea of what's in it. However, let's not worry about that.

The black box shown above has four inputs. The register can do one of two things: it can parallel load the inputs, that is, it can read in all four inputs and store the four bits into the array. Each element of the array can store a single bit.

It can also choose to ignore the inputs, and the values of the arrays remain unchanged. In this case, we say the array is "holding" its values.

The array's values is continuously being sent as output. Thus, if we could measure the output of the register (say, with a voltmeter), the four bits being output would correspond to the four bits currently being stored in the array.

This output is sent to the outside world where other devices can read the values, if they want to.

A register can have more than 4 bits stored in it. In fact, modern CPUs either store 32 or 64 bits in registers.

In reality, one bit of a register is really a flip flop, which is a device that can store one bit. We will discuss flip flops at some later point.

c |
Operation |

0 | Hold |

1 | Parallel Load |

Like combinational logic circuits, the **c** refers to a control
bit. Recall that control bits are used to determine which operation
or function a device performs.

Unlike combinational logic circuits, registers use clocks. Here's an important feature of registers (and sequential logic devices in general).

A device that is edge-triggered (which this register is) can only change values when there is a clock edge. In particular, we assume a register is positive-edge triggered, so it can only change values whenever a positive edge occurs.

Specifically, when the clock reaches a positive edge, the register
detects this event. It then reads in the value of **c**, the control
bit, and based on the value, either parallel loads (i.e., sets
**z _{3}z_{2}z_{1}z_{0}** =

If a clock is not at a positive edge, then the value of the registers is held, and does not change.

Here's an analogy. Many years ago, milk was delivered by a milkman, much in the same way newspapers are delivered today. (I guess in those days, they were always men, though if milkmen existed today they'd probably be called "milk attendants"). Imagine that the milkman comes by your house once a day during the weekdays.

You don't always want to have milk dropped off each day. When you are done with a milk bottle (usually made of glass), you leave it outside your door. The milkman sees the bottle, picks it up, and replaces it with a new bottle. However, when the milkman does not see the bottle then no new bottle is dropped off. He assumes that you have not yet completed a bottle of milk.

Similarly, a positive edge occurs on a regular basis (just like the milkman appears on a daily basis), and it's not always the case that you want to parallel load every time this happens. You want to control when a register is loaded. Sometimes you want it to parallel load, sometimes to hold its value. Thus, the need for a control signal.

However, in general, it's useful to design circuits with feedback (i.e., cycles). Circuits with feedback are easier to design if we can control how often the circuit is updated.

Thus, the need for a clock. For now, just believe that it's important for a register to have a clock.

A 4-bit register has the following inputs and outputs:

- 4 bits of data input
**b**_{3-0} - 1 control bit,
**c**, which indicates whether to perform a parallel load or hold. - A clock (which is an input), used for timing. The register will only perform the operation when there is a positive edge from the clock.

In particular, let's see what happens when a **c = 0**. I've
added boxes inside the register diagram so you can see the "bits".

Suppose the register contains bits 1010. The inputs are 0011.
When **c == 0** *and* there is a positive clock edge, then
the register maintains the value 1010. That is, it *holds*
this value.

The bits being fed into the input, i.e. 0011, are ignored.

If the clock is not currently at a positive edge (i.e., it's at a
level 1, or a level 0, or a negative edge), then the register also
holds the value. That is, it ignores the inputs
**b _{3-0}**, and maintains the value stored in the
register, in this case, 1010.

A register always outputs the bits it stores. Thus,
**z _{3-0}** = 1010, since those are the bits stored
in the register.

This register has "memory". That is, it stores information. In this case, it stores 4 bits of information.

After a positive edge occurs, the 4 bits are *read in* from
the input, in parallel. This overwrites the previous bits, and replaces
it with the new bits. In this case, those bits are 0011.

Once the bits are loaded, the outputs **z _{3-0}**
is 0011.

- A k-bit register contains k flip flops.
- Each flip flop can store a single bit.
- A positive edge-triggered flip flop (thus, a register) can only change the value of the bit on a positive edge.
- When a positive edge occurs, a register can either hold its
value (if
**c == 0**) or parallel load (if**c == 1**). - A parallel load means the bits are read in from the input
bits (
**b**) and stored in the k-bits within the register._{(k-1)-0} - A hold means the registers do not read in the bits, but maintains the current values of the bits.
- A register can only change its value at most once per positive edge.
- When the clock is not at a positive edge, the register maintains ("holds") its value.
- A k-bit register always outputs its values through
**z**._{(k-1)-0}

We'll look at a more detailed implementation in a future set of notes.