### Introduction

addi is an I-type instruction. This instruction allows you to add the contents of a register to an immediate value (a constant) and store the result in a (possibly) another register.

### Example and Semantics

The generic form of the addi are:
```addi \$rt, \$rs, immed
```
Notice that \$rt is the destination register. This is mostly because I'm getting the information from a book. Personally, I would have called it \$rd. Also, notice that \$rt is first, and \$rs is second.

The semantics are a little more complicated, so we'll write it below.

``` R[t] = R[s] + (IR15)16::IR15-0
```

In most CPUs (and even in C programming), you have to add similar kinds of quantities. Thus, adding a 32 bit quantity to a 16 bit quantity usually makes no sense.

Usually, the "smaller" quantity is promoted in size to the larger quantity. Thus, the 16 bit immediate value is made into a 32 bit immediate value.

How should this be done? Since the addition is on signed 2C, the best way to increase the immediate value from 16 bits to 32 bits is by sign-extension. That is, you repeat the sign bit (which is IR15 16 times, and make that the upper two bytes of a 32 bit number. The low 16 bits come from the low 16 bits of the instruction.

Sign-extension preserve the value of the bit representation. For example, if the bitstring had a value of -2 in 2C using 16 bits, then sign extending it creates a 32-bit 2C value that's also -2.

Here is a specific example of addi

```addi \$r1, \$r2, 3    # R[1] <- R[2] + 3
addi \$r1, \$r2, -3   # R[1] <- R[2] + (-3)
```
Because addi assumes the immediate is signed, there's no need for a subi instruction. In fact, MIPS doesn't support a subi instruction.

### Machine Code Representation

 Instruction B31-26 B25-21 B20-16 B15-0 opcode register s register t immediate addi \$rt, \$rs, 001 000 - - -

The dashes are 5-bit encoding of the register number in UB. For example, \$r7 is encoded as 00111. The rightmost dash is a 16-bit immediate value written in 2C.