Posted: June 19, 2003

Revised Late Penalty

Purpose

The goals of the project are:

• To convert a binary MIPS instruction to a string.
• To convert a MIPS instruction given as a string to an unsigned int.
• To understand how to convert base 10, hex, and binary.

Late Due Date

There is a 5% deduction per day. All projects are due by July 12, 2003.

Academic Integrity Statement

Please note that *all* programming projects in this course (including this one) are to be done independently or with the assistance of the instructional staff of this course only, unless otherwise specified IN PRINT by official webpages.

Please review the policies outlined on the class syllabus concerning the use of class computer accounts and concerning the University's Code of Academic Integrity. The instructors of this course will review the programs submitted by students for potential violations of the Code of Academic Integrity and if it is believed that a violation has occurred it will be referred to the Office of Judicial Programs and the Student Honor Council.

Hardcoding is considered a violation of academic integrity

Collaboration Policy

You may work in groups of two. If so, you need to turn in a single submission. The README should indicate the names and login IDs of both participants.

Specifications

You will be given a file called Translate.h. Load.h. The specifications are in the following link.

Translate Specification

Implement the methods. You may add helper methods, if you want.

How To Code

You will be provided a binary file containing 5 (or so) instructions encoded in binary. Using input redirection or opening a file, write a loop that reads in an unsigned int, passes it to the binToString method, and prints out the instruction as assembly.

The strategy should be this. Start off with an instruction (like add). I will provide a "hexWrite" executable (this is hexdump with the -W option). Write the encoding of say, "add $r1, $r2, $r3" in hex (4 hex pairs, in ASCII). Then use the hexWrite to generate the true binary file.

Test to see if your binToString() method works. Then, write the stringToBin() for the "add".

Essentially, for each instruction, write the stringToBin() and corresponding binToString(). The idea is to be able to test your code by feeding it to one function, then to the other, and see if it produces the same result.

Try to encode the following instructions at a minimum:

• add
• addi
• beq
• j
• lw

Examples will be provided by the weekend, hopefully, in the posting account.

Points

Doing the minimum 5 instructions above is worth 45 points out of 100. Doing the remaining will be worth the remaining 55 points. If you do not implement an instruction, then when encoding stringToBin(), encode all 0's. When implementing binToString() print out "UNKNOWN" if you can't tell what instruction you have.

Recall, for each instruction, implement a binToString() case and a stringToBin() case.

We will test your code by passing in strings or unsigned int to your functions. (For Java folks, we pass in Java strings, or int).

We will assume your program has a main.cpp and then call up your two functions binToString() and stringToBin(). We will replace your main.cpp with our own. A sample version should be posted to the posting account soon.

Other Specs

• Instead of labels, jump instructions will contain a 32 bit hex, written in 0xcafedabe format. You must translate the low 26 bits out of that. (The letters may be partly or completely capitalized: 0xCAFE1001 is valid too, as is 0xCAfeDAB0 or 0Xcafe1234).
• Instead of labels, branch instructions contain a base 10 value, possibly with a minus sign, e.g.

    beq $r1, $r2, -24
  

  You may assume the value is divisible by 4, and once you divide it by 4, it can be represented as a 16 bit 2C number. The -24 indicates to jump to 24 bytes before, but because beq jumps based on relative words, you divide -24 by 4 to get -6, which means jump back 6 words.
• You should be able to handle either signed base 10 values of hex values for immediate quantities. Thus, you should be able handle:

    addi  $r1, $r2, -10
    addiu $r1, $r2, 10
    ori   $r1, $r2, 0x1243
  

  When printing out the values, logical operators should print out in hex, arithmetic operators should print out in signed base 10. Unsigned arithmetic should print out in unsigned base 10.

  The easiest way to do this is to take the 16 bits and modify a short int, and use signed or unsigned as necessary.

Useful Hint

You may wish to write a function which converts a string of 32 chars consisting of 0's and 1's (in ASCII) to an 32 bit unsigned int. (You can test this with hexdump).

This will allow you to create binary representations of instructions as strings, and then convert them to an unsigned int.

Format of instructions

Note: || means concatentation
Note: 0¹⁶ means 16 zeroes.
Note: PC refers to the program counter
Note:

• rs stored at B_25-21
• rt stored at B_20-16
• rd stored at B_15-11

Note:

• immed values for addi are written in signed base 10, but stored in 16-bit 2's complement.
• immed values for logical operations (andi, xori, etc.) are written in unsigned base 10, and stored in unsigned binary.
• Labels for jump instructions will be written in hexadecimal with a leading 0x followed by 8 hex digits. Use the low 26 bits, and store there.
• Labels for branch instructions will be written in signed base 10 and stored in 16-bit 2's complement.

Note: Bits are numbered so that B⁰ is the least signficant bit and B³¹ is the most significant bit.

Note: Minimum instructions needed to pass primary: add, addi, beq, j, jal, or, ori. You need to translate to and from.

Command	Explanation
add $rd, $rs, $rt	Reg[ d ] = Reg[ s ] + Reg[ t ] R-type instruction B31-26 = 000000 (SPECIAL) B10-6 = 000000 B5-0 = 100000 (ADD)
addi $rt, $rs, immed	Reg[ t ] = Reg[ s ] + (immed15)16 || immed15-0 I-type instruction B31-26 = 001 000 Immediate value is sign extended Immediate value written in signed base 10
sub $rd, $rs, $rt	Reg[ d ] = Reg[ s ] - Reg[ t ] R-type instruction B31-26 = 000 000 (SPECIAL) B10-6 = 00000 B5-0 = 100 010 (SUB)
addu $rd, $rs, $rt	Reg[ d ] = Reg[ s ] + Reg[ t ] Unsigned addition R-type instruction B31-26 = 000 000 (SPECIAL) B10-6 = 00000 B5-0 = 100 001 (ADD)
addiu $rt, $rs, immed	Reg[ t ] = Reg[ s ] + (0)16 || immed15-0 I-type instruction B31-26 = 001 001 Immediate can be stored as 16 bit UB in immediate field in instruction. Immediate value is zero extended Immediate value written in unsigned base 10
subu $rd, $rs, $rt	Reg[ d ] = Reg[ s ] - Reg[ t ] Unsigned subtraction R-type instruction B31-26 = 000 000 (SPECIAL) B10-6 = 00000 B5-0 = 100 011 (SUBU)
and $rd, $rs, $rt	Reg[ d ] = Reg[ s ] & Reg[ t ] Bitwise AND R-type instruction B31-26 = 000 000 (SPECIAL) B10-6 = 00000 B5-0 = 100 100 (AND)
andi $rt, $rs, immed	Reg[ t ] = Reg[ s ] & 016 || immed15-0 I-type instruction B31-26 = 001 100 Immediate value is zero extended Immediate value written in 4 hex digits (e.g., 0xcafe)
or $rd, $rs, $rt	Reg[ d ] = Reg[ s ] | Reg[ t ] Bitwise OR R-type instruction B31-26 = 000 000 (SPECIAL) B10-6 = 00000 B5-0 = 100 101 (OR)
ori $rt, $rs, immed	Reg[ t ] = Reg[ s ] | 016 || immed15-0 I-type instruction B31-26 = 001 101 Immediate value is zero extended Immediate value written in 4 hex digits (e.g., 0xcafe)
xor $rd, $rs, $rt	Reg[ d ] = Reg[ s ] ^ Reg[ t ] Bitwise XOR R-type instruction B31-26 = 000 000 (SPECIAL) B10-6 = 00000 B5-0 = 100 110 (XOR)
xori $rt, $rs, immed	Reg[ t ] = Reg[ s ] ^ 016 || immed15-0 I-type instruction B31-26 = 001 110 Immediate value is zero extended Immediate value written in 4 hex digits (e.g., 0xcafe)
beq $rs, $rt, LABEL	if ( Reg[ s ] == Reg[ t ] )      jump to LABEL else      go to next instruction I-type instruction B31-26 = 000 100 offset is B15-0 Jump to PC + [ (offset15)14 || offset || 02 ] i.e., the offset is shifted to the left by 2, then sign extended. Immediate written using signed base 10 (divide by 4) CORRECTION: LABEL is written as signed based 10 number, ignore divide by 4 (e.g., LABEL might be -21)
bne $rs, $rt, LABEL	if ( Reg[ s ] != Reg[ t ] )      jump to LABEL else      go to next instruction I-type instruction B31-26 = 000 101 offset is B15-0 Jump to PC + [ (offset15)14 || offset || 02 ] i.e., the offset is shifted to the left by 2, then sign extended. Immediate written using signed base 10 (divide by 4) CORRECTION: LABEL is written as signed based 10 number, ignore divide by 4 (e.g., LABEL might be -21)
slt $rd, $rs, $rt	if ( Reg[ s ] < Reg[ t ] )      Reg[ d ] = 0311 else      Reg[ d ] = 032 R-type instruction B31-26 = 000 000 (SPECIAL) B10-6 = 00000 B5-0 = 101 010 (SLT)
slti $rt, $rs, immed	if ( Reg[ s ] < (immed15)16 || immed15-0)      Reg[ d ] = 0311 else      Reg[ d ] = 032 I-type instruction B31-26 = 001 010 Immediate written in signed base 10
jr $rs	R-type instruction (sort of) B31-26 = 000 000 (SPECIAL) B25-21 is $rs B20-6 = 000 0000 0000 0000 B5-0 = 001 000 (JR)
j LABEL	PC <- PC31-28 || immed || 02 immed is 26 bit value J-type instruction B31-26 = 000 010 LABEL is written using 8 hex digits, e.g. 0x00ff00ff. Assume that upper 6 bits is 0.
jal LABEL	PC <- PC31-28 || immed || 02 immed is 26 bit value Reg[ 31 ] <- PC + 4 (In the real MIPS, it should be PC + 8, but that's mostly because of pipelining--we use the simpler PC + 4, which is the next instruction). J-type instruction B31-26 = 000 011 Label is 8 hex digits (e.g., 0xcafe1234). CORRECTION: LABEL is written using 8 hex digits, e.g. 0x00ff00ff. Assume that upper 6 bits is 0.
jalr $rs	Jump-and-link using register (instead of label) PC <- Reg[ s ] B31-26 = 000 000 (SPECIAL) B25-21 is register s B20-16 = 00000 B15-11 = 11111 B10-6 = 00000 B5-0 = 001 001 (JALR) Reg[ 31 ] <- PC + 4 (In the real MIPS, it should be PC + 8, but that's mostly because of pipelining--we use the simpler PC + 4, which is the next instruction). R-type instruction
lw $rt, offset($rs)	I-type instruction offset is sign-extended to 32 bits, and added to Reg[ s ] to produce address. The content of that address (which must be word-aligned), is placed in Reg[ t ] B31-26 = 100 011 B15-0 is the offset (2C) offset written in signed base 10
lbu $rt, offset($rs)	I-type instruction offset is sign-extended to 32 bits, and added to Reg[ s ] to produce address. The content of that address (which does NOT have to be word-aligned), is placed in Reg[ d ] B31-26 = 100 100 B15-0 is the offset (2C) offset written in signed base 10
sw $rt, offset($rs)	I-type instruction offset is sign-extended to 32 bits, and added to Reg[ s ] to produce address. The content of Reg[ t ] is saved at that address (which must be word-aligned) B31-26 = 101 011 B15-0 is the offset (2C) offset written in signed base 10
sb $rt, offset($rs)	I-type instruction offset is sign-extended to 32 bits, and added to Reg[ s ] to produce address. The content of Reg[ t ] is saved at that address (which does NOT have to be word-aligned) B31-26 = 101 000 B15-0 is the offset, written in signed base ten.
lui $rt, immed	I-type instruction Reg[ t ] = immed || 016 B31-26 = 001 111 B25-21 = 00000 (normally where rs goes, but leave it all zeroes) Immediate written using 4 hex digits (as in 0xcafe).
bgtz $rs, LABEL	I-type instruction B31-26 = 000 111 B20-16 = 00000 Let offset = B15-0 PC-relative addressing. Let target = (offset15)14 || offset || 02 PC <- PC + target Immediate written using signed base 10 (divide by 4) CORRECTION: LABEL is written as signed based 10 number, ignore divide by 4 (e.g., LABEL might be -21)
bgez $rs, LABEL	I-type instruction B31-26 = 000 001 (REGIMM) B20-16 = 00001 (BGEZ) Let offset = B15-0 PC-relative addressing. Let target = (offset15)14 || offset || 02 PC <- PC + target Immediate written using signed base 10 (divide by 4) CORRECTION: LABEL is written as signed based 10 number, ignore divide by 4 (e.g., LABEL might be -21)
bltz $rs, LABEL	I-type instruction B31-26 = 000 001 (REGIMM) B20-16 = 00000 (BLTZ) Let offset = B15-0 PC-relative addressing. Let target = (offset15)14 || offset || 02 PC <- PC + target Immediate written using signed base 10 (divide by 4) CORRECTION: LABEL is written as signed based 10 number, ignore divide by 4 (e.g., LABEL might be -21)
blez $rd, LABEL	I-type instruction B31-26 = 000 110 B20-16 = 00000 Let offset = B15-0 PC-relative addressing. Let target = (offset15)14 || offset || 02 PC <- PC + target Immediate written using signed base 10 (divide by 4) CORRECTION: LABEL is written as signed based 10 number, ignore divide by 4 (e.g., LABEL might be -21)
sll $rd, $rt, shift_amt	R-type instruction Shift left logical B10-6 is the shift amount (between 0-31) B31-26 = 000 000 (SPECIAL) B5-0 = 000 000 (SLL) B10-6 is a 5 bit UB shift amount. Shift a copy of Reg[ t ] left by shift_amt bits, inserting zeroes into the low order bits (right end).
srl $rd, $rt, shift_amt	R-type instruction Shift right logical B10-6 is the shift amount (between 0-31) B31-26 = 000 000 (SPECIAL) B25-21 = 00000 ($rs is zeroed out) B5-0 = 000 010 (SRL) B10-6 is a 5 bit UB shift amount. Shift a copy of Reg[ t ] right by shift_amt bits, inserting zeroes into the high order bits (left end) shift_amt is base 10 number between 0 and 31
sra $rd, $rt, shift_amt	R-type instruction Shift right arithmetic B10-6 is the shift amount (between 0-31) B31-26 = 000 000 (SPECIAL) B25-21 = 00000 ($rs is zeroed out) B5-0 = 000 011 (SRA) B10-6 is a 5 bit UB shift amount. Shift a copy of Reg[ t ] right by shift_amt bits, inserting the sign bit into the high order bits (left end) shift_amt is base 10 number between 0 and 31
sllv $rd, $rt, $rs	R-type instruction Shift left logical variable B31-26 = 000 000 (SPECIAL) B10-6 = 00000 B5-0 = 000 100 (SLLV) Shift a copy of Reg[ t ] left by the amount stored in low 5 bits of Reg[ s ], placing shifted result in Reg[ d ]. Zeroes should be shifted from least significant end (right end)
srlv $rd, $rt, $rs	R-type instruction Shift right logical variable B31-26 = 000 000 (SPECIAL) B10-6 = 00000 B5-0 = 000 110 (SRLV) Shift a copy of Reg[ t ] right by the amount stored in low 5 bits of Reg[ s ], placing shifted result in Reg[ d ]. Zeroes are shifted in from most significant end (left end)
srav $rd, $rt, $rs	R-type instruction Shift right arithmetic variable B31-26 = 000 000 (SPECIAL) B10-6 = 00000 B5-0 = 000 111 (SRAV) Shift a copy of Reg[ t ] right by the amount stored in low 5 bits of Reg[ s ], placing shifted result in Reg[ d ]. Sign bit is shifted in from most significant end (left end)

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