Due Date: March 20

Assume that we have 2 multiply and 2 addition functional units and we are executing the following code:

Multd F6,F8,F0

Addd F0,F2,F4
Subd F6,F6,F10
Multd F12,F0,F6
Addd F14,F16,F18
For each cycle,
a) For Tomasulo algorithm:

show the status of the instruction, the state of the reservation station table, and the state of the register status table.

Assume that only a single reservation station can access the common data bus at a given time

b) For the Scoreboard algorithm, show the status of the instruction, the functional unit status and register result status.

Assume that reading operands requires one cycle and that writing back requires its own cycle (i.e. writing back is not combined with execute).