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Cache: fully-associative |
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More flexible cache
management |
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fully-associative |
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Assume cache consists of
27 = 128 slots, with 25 = 32 bytes per cache line |
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Address A31-0 consists of tag bits A31-5 and offset A4-0 |
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If data not in the cache,
pick a slot |
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Fully-associative cache:
may go in any slot |
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Pick one with V = 0 |
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If none, evict a slot
using replacement policy (LRU, FIFO, etc.) |
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How do we know if a cache
line is in the cache? |
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Must search every slot,
but hardware can search in parallel, unlike software |
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Compare the address tag
bits with the tags of each slot in the cache |
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Can be done using a
comparator (combinational circuit using XNOR gates) |
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Must also have valid bit
V = 1 |
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Complexity of hardware
to manage fully-associative cache slows down the speed |
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of the cache, so it is
not generally used |
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