----- Original Message -----
From: Bill Pugh <firstname.lastname@example.org>
Sent: Sunday, November 07, 1999 1:47 PM
Subject: JavaMemoryModel: A memory model for the masses
> An important point to keep in mind is that we shouldn't be defining a
> memory model that we would like to program to. Rather, we have to define a
> memory model for the millions of Java programmers who are rather
> unsophisticated when it comes to concurrency.
> I can imagine two approaches to that goal.
> (a) One approach is to devise a model that will allow as many as possible
> of their naive notions about concurrent programming to work, while still
> being possible to implement the model on SMP's with weak memory models with
> reasonable efficiency.
I think your use of "naive" and "unsophisticated" might be misunderstood.
These terms certainly have a fractal-like boundary, but these terms do not
come to mind when I think of James Gosling (*), Patrick Chan, the JINI
developers, Josh Bloch (before he read the fine print), and the other
admirable Java experts who, judging by their code, are not (or were not) aware
of the possibility of per-thread-caching and the other details of the JMM that
make writing correct concurrent code so hard to do.
If you just focus on the concurrent code written by Java experts ("general"
Java experts, that is: not concurrent programming experts), and if you just
focus on the concurrent code that actually works today on most JVMs, then I
think you *can* draw a box. In that box, there is no per-thread-caching. In
that box objects are as visible as their references. That box is a tricky, but
not an unreasonably harsh environment for programmers. Furthermore - and I
can't explain how this happened without drawing on some fairly complex
conspiracy theory - that box is what most of the Java books and tutorials
describe when they describe Java threads.
I claim that the problem is not that one can't draw a box, but that this box
can't be implemented efficiently on SMP's with weak memory models. To emulate
this box on some hardware may require memory barriers around every
instruction, or it may even prevent more than one thread from running at a
time, with each thread flushing its working memory as it is pre-empted.
Actually, my claim is only that there is such a box. Whether this box can be
implemented efficiently on SMP's, I leave for the SMP experts to decide.
(*) I'd be happy to supply examples from production code and publications.
Realize that my aim is not to show-up or humiliate anyone. I would never pick
on anyone who actually was "naive" or "unsophisticated".
-- Joe Bowbeer
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