At 1:42 PM -0500 7/18/01, Sarita Adve wrote:
>As far as option (2), it enables reading early from a processor's own write
>buffer. Many systems allow this, including Alpha, SPARC, and Intel. However,
>it turns out that this is not detectable with Alpha and PowerPC models (and
>for that matter with SC).
If you allow SMT (threads sharing a processor), wouldn't it be
possible for a thread to see writes from other threads on the same
processor early?
This probably isn't an issue without SMT, because the context switch
overhead will almost certainly include a memory barrier.
Bill
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