Exam Information

Final Information

• Day Saturday, May 17, 2003
• Time 4-6 PM.
• Exam duration 120 minutes
• Location Armory 0135.
• Makeups Only to students with 3 exams in 2 days, or an exam that meets at the same time, or those with religious observances.

  Current makeup times are:

  • To be scheduled
  Send chs11002@dc.umd.edu for makeups. Include your final schedule, and reason to take the makeup.
• Topics The following is a partial list of topics. Anything covered in class, class notes, projects, and relevant chapters of the book can be considered "fair game" for the exam. The exam will be in three parts: combinational logic, sequential logic, MIPS assembly (mostly functions and arrays)

  Old Topics

  • Any topic from either Exam 1 or Exam 2

  Memory

  • Slots
  • Direct Mapped Cache
  • Set Associative Cache
  • Fully Associative Cache
  • Spatial/Temporal Locality
  • Cache Hit vs. Cache Miss
  • Interleaved Memory (what it is, why we have it)
  • Designing chip enable for Interleaved Memory (may post notes on this)

  Design MIPS CPU

  • Read sections 5.1, 5.2, 5.3
  • Be very familiar with diagram on page 360 (may ask you to reproduce diagram)
  • Will probably provide you a diagram similar to 353
  • Which components have "state" (i.e., flip flops) and which do not?
  • What are the control signals used in the Control Unit
  • What are the sequence of things that occur, and which parts of the circuit do they affect? (See end of 5.3 about how load, branch, add instructions execute).

  Other topics

  • Register Files (may post notes on this)
  • Tri-State Buffers
  I may add topics to this list, so keep an eye on it. (I'll make a mention in the main webpage, if this happens---though not likely to).

Exam 2 Information

• Day Monday, May 5, 2003
• Time 5:30 PM.
• Exam duration 90 minutes
• Location CSIC 1115. This is the large room on the first floor if the new building.
• Makeups Contact Kinga to arrange makeup times. Email her at kinga@cs.umd.edu.

  Current makeup times are:

  • Wednesday 6 PM - 8 PM (May 7) to be proctored by Kinga
  Send her your name, your student ID and section, and the time you prefer to do the makeup (it's still 90 minutes). If you can't make these times, we'll figure out what to do.

  You may be asked to bring in documentation, so have that ready (thus, if you work, get your supervisor to say that you work on certain days, if you have a class, you can print out a schedule, if you're in a band, have the band director fill out a note to that effect).

• Topics The following is a partial list of topics. Anything covered in class, class notes, projects, and relevant chapters of the book can be considered "fair game" for the exam. The exam will be in three parts: combinational logic, sequential logic, MIPS assembly (mostly functions and arrays)

  Note: a comprehensive list of topics is not something every instructor/professor provides. It's often considered a skill to figure out what you need to know for an exam. However, due to lack of HWs, here's a list.

  Additional Topics

  • Know the instruction formats for R, I, J type (i.e., how many bits used for opcodes, and how many bits used for registers, and which bits in the instruction). Also, know basically what a branch and jump instruction do (in terms of computing addresses)
  • Look at Chapter 3.6 (Functions), 3.8 (Addressing), 3.9 (Example on linking), 3.11 (Arrays). (Though you should be use a book and figure this out).
  • As a supplement (but not really required), read Chapter 5 up to page 380. This is a supplement to the Thursday handout. However, you mostly just have to understand the Thursday handout. I will post a link to that soon (or pick it up in class).
  • Just for fun, look at page 396-398 to see finite state machines used in CPU design.
  • Implementation of register files won't be on the second exam, but is likely to be on the final.

  Combinational Logic

  • Truth tables
  • Writing Boolean expressions (in sum of products) from truth table
  • Logic gates (NOT, AND, OR, NOT, NAND, NOR, XNOR)
  • Functional completeness of certain logic gates
  • Combinational logic circuits: adders (full, half, ripple), MUX, DeMUX, encoders, decoders, priority encoders
  • Be able to write Boolean expressions for the outputs of these circuits
  • Be able to implement, say, a 4-1 MUX given 2-1 MUXes (and in general bigger parts from smaller ones).
  • May need to understand integer representations and operations (such as addition, overflow).

  Sequential Logic

  • Clocks (what is it, key features)
  • Characteristic table of flip flops
  • Excitation table of flip flops
  • What is state?
  • Finite state machines (Mealy and Moore machines)
  • Implementing sequential circuits from FSMs using ROMs
  • Equivalence of flip flops
  • Common sequential circuits: counters, parallel load registers
  • Timing diagrams

  MIPS

  • Functions
  • Arrays
  • Possibly linkers and loaders
  • Basic hardware design of MIPS
  I may add topics to this list, so keep an eye on it. (I'll add it at the end, and date it, so you can see).

Exam 1 Information

• Day Monday, March 17, 2003
• Time 5 PM. However, we'll admit students into the exams at 5:15 and 5:30 (you will have to wait outside until you're admitted into the room, if you come after 5:05).
• Exam duration 90 minutes
• Location HJP 0226 (H.J. Patterson) DO NOT GO TO J. M. Patterson. That's a different building.
• Makeups Contact Kinga to arrange makeup times. Email her at kinga@cs.umd.edu.

  Current makeup times are:

  • Tuesday 11 AM-1 PM (March 18) to be proctored by Nick
  • Wednesday 3 PM-5 PM (March 19) to be proctored by Kinga (TIME CORRECTION)
  Send her your name, your student ID and section, and the time you prefer to do the makeup (it's still 90 minutes). If you can't make these times, we'll figure out what to do.

  You may be asked to bring in documentation, so have that ready (thus, if you work, get your supervisor to say that you work on certain days, if you have a class, you can print out a schedule, if you're in a band, have the band director fill out a note to that effect).

• Topics The following is a partial list of topics. Anything covered in class, class notes, projects, and relevant chapters of the book can be considered "fair game" for the exam. The exam will be in three parts: data representation, low-level C operators, and MIPS assembly.

  Note: a comprehensive list of topics is not something every instructor/professor provides. It's often considered a skill to figure out what you need to know for an exam. However, due to lack of HWs, here's a list. It's rather lengthy, so you should begin preparations soon.

  • Conversion of numbers from one base to another
  • Easy conversion of hex, octal, binary without going through base 10
  • Writing numbers in the following representation systems (using N bits): unsigned binary, signed magnitude (SM), one's complement (1C), two's complement (2C), excess/bias notation.
  • Knowing the range of valid values for a given representation (minimum/maximum values)
  • Know advantages/disadvantages of representation system
  • Number of different bitstrings given N bits.
  • Representation vs. value (see class notes)
  • Simple binary addition
  • Overflow
  • Sign extension
  • Endianness
  • Character representation: ASCII/Unicode (No need to memorize the ASCII code, but know some basic facts about it).
  • Floating point representation (tough!)
  • Basic floating point multiplication
  • Low-level bitwise/bitshift operation (accessing/manipulating bits).
  • How to read/write to binary files
  • Basic MIPS: number of registers
  • Translate code from C if-else, loops, function calls, arrays in MIPS
  • Encoding of instructions in MIPS (at least, add, addi j, and beq).
  I may add topics to this list, so keep an eye on it. (I'll add it at the end, and date it, so you can see).

Web Accessibility