With more registers the compiler can be more aggressive when optimizing code. Unrolling loops eliminates many branch delays, and with more registers at its disposal, the compiler can unroll loops many more times while still being able to leave global variables in registers.

Well, registers are very expensive, so adding many more registers will increase the cost of an IA-64 chip. The compiler will also have to be designed to take advantage of this new, increased amount of registers and put them to best use.

Since the compiler explicitly tells the CPU in the template field at the beginning of a bundle of instructions which instructions can execute in parallel, the CPU does not have to analyze the instruction stream at run time to find parallelism.

The compiler must do much more work to determine which instructions are parallelizeable, requiring a much more sophisticated compiler.

The compiler can do many of the execution optimizations ahead of time, taking the burden off of the CPU. The CPU can then execute instructions quicker because it does not have to waste time figuring out how to order instructions for optimal execution. Two of IA-64's biggest breakthroughs, speculation and predication, are only possible if the compiler is responsible for more optimizations.

IA-64 compilers will be required to do much more work than current compilers, so compile-time for programs will probably increase significantly. IA-64 instructions are also longer than RISC instructions, so code size will increase. Because compilers will have to be so much smarter, it is likely that the first IA-64 compilers will not be able to take full advantage of the ISA. It will take several years before good, optimizing IA-64 compilers will be available.

Predication effectively reduces branch penalties. When a branch is found, the CPU starts executing the code for every possible branch outcome. At the machine level there really is no branch, there is just one unbroken stream of code that the compiler has rearranged in the most parallel order. This increases execution time and eliminates the possiblility of mispredicting a branch. It also reduces code fragmentation because the compiler can merge small basic blocks into larger blocks that a branch won't chop up. This in turn gives the compiler more freedom to rearrange instructions for parallel execution.

Predication cannot remove every branch in any given piece of code. In fact, it is only able to remove approximately half of all branches. If a branch cannot be predicated, the IA-64 processor will behave like other processors, trying to predict which path the branch will take. The other down side to predication is that the CPU always executes instructions that it is going to throw away.

Software compiled to run on one processor will be able to run on the next implementation of the processor without recompilation. This means a great deal to businesses who invest a lot of money in software as well as hardware. When they want to upgrade their old IA-64 chip to a new one they will still be able to use software that they used on their old machines. This is different than the backwards compatitbility of the x86 chips however. The backwards compatitbility built into the IA-64 chip allows designers of new IA-64 chips to add more registers and/or functional units and speed up or slow down latencies as they wish to make the chip faster. This change in hardware will not affect the function of software designed for older chips because of the inherent "backwards compatibility" built into the IA-64 architecture. What this means for businesses is that they will be able to buy significantly faster hardware without affecting the ability to run their old software.

Although newer IA-64 processors will be able to run software that was designed for older IA-64 chips, the software might not run at top speeds until it is recompiled for that specific chip. This is due to the fact that compilers will have to do more work optimizing the instruction stream for the CPU, and the compiler will have to know more about the CPU it targets. Different IA-64 implementations will be optimized slightly differently by the compiler. So, when IA-64 becomes the norm, software companies may have to ship multiple binaries to get the best performance on a broad base of IA-64 systems.

Read on, and you will find out all that you ever wanted to know.