| Register file: implementing | |||||||||||||||
| Register file uses combinational logic with a set of registers | |||||||||||||||
| We attach the outputs of each register to two buses, using tri-state buffers for each. | |||||||||||||||
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| How to select the right registers? | |||||||||||||||
| SRC 1 addr and SRC 2 addr | |||||||||||||||
| How many bits for 4 registers? ceil( lg( 4 ) ) = 2 bits | |||||||||||||||