| Instruction execution steps | ||||||||||||||
| 1. IF (Instruction Fetch) | ||||||||||||||
| address of instruction to be executed is in PC (program counter, a hidden register) | ||||||||||||||
| instruction is copied from memory to IR (instruction register, another hidden register) | ||||||||||||||
| 2. D (Decode the instruction, Fetch Operands) | ||||||||||||||
| determine what operation to perform (opcode, function) | ||||||||||||||
| get operand values | ||||||||||||||
| add | ||||||||||||||
| get 2 operands from registers | ||||||||||||||
| addi | ||||||||||||||
| get 1 operand from register, 1 from instruction itself (sign-extended immediate) | ||||||||||||||
| 3. ALU (Perform the operation) | ||||||||||||||
| arithmetic, logical, etc. | ||||||||||||||
| action performed by ALU circuits | ||||||||||||||
| 4. MEM (Memory access) | ||||||||||||||
| MIPS: only load or store instructions | ||||||||||||||
| 5. WB (Write Back) | ||||||||||||||
| result of third step is written to the appropriate register | ||||||||||||||
| 6. PC Update (Program Counter Update) | ||||||||||||||
| normally, PC <- PC + 4 | ||||||||||||||
| branch or jump: some other address | ||||||||||||||