| Multi-cycle datapath | ||||||||||||||
| Datapath with MUXes for selection: | ||||||||||||||
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| MUX 1: select between PC and ALUOut for memory address | Fig. 5.31 | |||||||||||||
| MUX 2: select between $rt and $rd for destination register address | ||||||||||||||
| MUX 3: select between ALUOut and memory data for write data input to register file | ||||||||||||||
| MUX 4: select between PC and register data A for first operand input to ALU | ||||||||||||||
| MUX 5: select between register data B, constant 4, sign-extended immediate, | ||||||||||||||
| shifted immediate for second operand input to ALU | ||||||||||||||