| Labels | |||||||||||||
| Branch Instructions and Labels | |||||||||||||
| Do we want to have to compute the value of the offset for a branch instruction? No. | |||||||||||||
| too much work | |||||||||||||
| subject to error | |||||||||||||
| may need to change if instructions are added or removed | |||||||||||||
| better way: | |||||||||||||
| beq $r1, $r2, L1 # (0) If R[1] == R[2] goto L1 | |||||||||||||
| addi $r1, $r1, 1 # (1) R[1]++ | |||||||||||||
| addi $r2, $r2, 1 # (2) R[2]++ | |||||||||||||
| L1: add $r1, $r1, $r2 # (3) R[1] = R[1] + R[2] | |||||||||||||
| L1 is a label referring to the address of the instruction where it is located | |||||||||||||
| The assembler computes the offset | |||||||||||||
| target instruction - (branch instruction + 1). | |||||||||||||
| The same rule applies even if you branch backwards | |||||||||||||
| Why compute branch instruction + 1? | |||||||||||||
| Once the instruction is fetched, PC is incremented to PC + 4, | |||||||||||||
| next instruction in memory | |||||||||||||
| This kind of address computation is called PC-relative | |||||||||||||
| Jump Instructions and Labels | |||||||||||||
| Jump instructions also jump to labels (at least, j and jal) | |||||||||||||
| Assembler figures out the appropriate addresses using pseudo-direct addressing. | |||||||||||||
| Disadvantage compared to PC-relative addressing: It's harder to relocate the code | |||||||||||||