| Jump instructions | |||||||||||||
| Instruction | Semantics | ||||||||||||
| j offset | # | PC <-- PC31-28 :: IR25-0 :: 00 | jump to target address | ||||||||||
| jr $rs | # | PC <-- R[s] | jump to address in $rs | ||||||||||
| jal offset | # | R[31] = PC + 4 | save return address in $ra | ||||||||||
| # | PC <-- PC31-28 :: IR25-0 :: 00 | jump to target address | |||||||||||
| jalr $rs | # | R[31] = PC + 4 | save return address in $ra | ||||||||||
| # | PC <-- R[s] | jump to address in $rs | |||||||||||
| Formats | |||||||||||||
| What's different about j, jal? No regs specified. | |||||||||||||
| offset: usually 16-bit 2C immediate, except j and jal 26-bit UB (J-type) | |||||||||||||
| Note that type refers to FORMAT, not function, so branch instrs are not J-type | |||||||||||||
| What type are jr and jalr? | |||||||||||||
| Since registers have to be specified, jr and jalr are R-type | |||||||||||||
| Addressing: pseudo-direct | |||||||||||||
| doesn't specify 32-bit address directly | |||||||||||||
| allows you to access how much of all possible word-aligned addresses? | |||||||||||||
| Jumping to arbitrary word-aligned addresses | |||||||||||||
| j and jal still don't allow you to access all possible word-aligned addresses | |||||||||||||
| jr and jalr refer to a register, which specifies the entire 32 bit instruction | |||||||||||||