PhD Proposal: Automatic Optimization of Irregular Memory Accesses for the PGAS Programming Model

Thomas Rolinger
12.10.2021 13:00 to 15:00

IRB 5165

Applications that operate on large, sparse graphs and matrices exhibit fine-grained irregular memory accesses patterns, leading to both performance and productivity challenges on today's distributed-memory systems. The Partitioned Global Address Space (PGAS) model attempts to address these challenges by combining the memory of physically distributed nodes into a logical global address space, simplifying how programmers enact communication in their applications. However, while the PGAS model can provide high development productivity, performance issues that arise from irregular memory accesses are still present.This proposal aims to bridge the gap between high productivity and high performance for irregular applications in the PGAS programming model via automatic optimizations. We have explored techniques such as data replication, message aggregation and data placement for irregular applications on a variety of different systems. We demonstrated the potential for applying these optimizations automatically to programs written in the Chapel parallel programming language. We propose to implement these optimizations as part of the Chapel compiler, as well as explore additional runtime-based optimizations. Furthermore, we intend to evaluate the efficacy of these techniques on additional systems and develop performance models that can tune each optimization for a given system platform.Examining Committee:

Chair:Department Representative:Members:

Dr. Alan Sussman Dr. Leonidas Lampropoulos Dr. Abhinav Bhatele