PhD Defense: Compiler Optimizations for Irregular Memory Access Patterns in the PGAS Programming Model

Talk
Thomas Rolinger
Time: 
04.19.2023 14:00 to 16:00
Location: 

Applications that operate on large, sparse graphs and matrices exhibit fine-grained irregular memory accesses patterns, leading to both performance and productivity challenges on today's distributed-memory systems. The Partitioned Global Address Space (PGAS) model attempts to address these challenges by combining the memory of physically distributed nodes into a logical global address space, simplifying how programmers enact communication in their applications. However, while the PGAS model can provide high developer productivity, the performance issues that arise from irregular memory accesses are still present. This dissertation aims to bridge the gap between high productivity and high performance for irregular applications in the PGAS programming model.To achieve that goal, I designed and implemented COPPER, a framework that performs Compiler Optimizations for Productivity and PERformance. COPPER automatically performs static analysis to identify irregular memory access patterns to distributed data within parallel loops, and then applies code transformations to enact optimizations at runtime. These optimizations perform small message aggregation, adaptive prefetching and selective data replication. Furthermore, they are applied without requiring user intervention, thereby improving performance without sacrificing developer productivity. I demonstrate the capabilities of COPPER by implementing it within the Chapel parallel programming language and show that the performance of a variety of irregular applications across different hardware platforms can be improved by as much as 444x.

Examining Committee

Chair:

Dr. Alan Sussman

Dean's Representative:

Dr. Donald Yeung

Members:

Dr. Abhinav Bhatele

Dr. Laxman Dhulipala

Dr. Leonidas Lampropoulos
Dr. Michelle M. Strout (Univ. of Arizona)